August 12, 2010

Comparison of two power circuit, a common practice is to run out of STA sdf file, VCS waveform simulation ran after, respectively, and then feed the tool with primepower line power analysis. For simple gate-level circuits, such a process appears complicated and inefficient, and then manual power consumption may be more useful.

Manual calculation of power consumption method

 1. internal power. For each pin, the energy consumed by each transition is found in the library file based on the transition time of the transition. For output pin, its output_load is also required. At the same time, the number of transitions is calculated, and the short-circuit energy consumed by the transition is accumulated.

 2. switch power. For each input pin, calculate the number of transitions. The energy consumed by each transition is: C × V × V, C = fanout_load × C_wire_load + Cpin

3. The energy accumulation of the first two is divided by the total time to obtain the dynamic power consumption; dividing by the transition time can estimate the peak power consumption.

4. The leakage power consumption is equal to the accumulation of the leakage power consumption of each cell. It should be noted that the input and output of the cell are different, and the leakage power consumption will be slightly different.

Example of manual calculation of power consumption

Here is an example of a common circuit:

It is assumed that En and the input remain unchanged. The ClkSrc frequency is 1MHz.

 5. Internal power

The level transition point is only the CP end of the Reg. Check the lib file to know that the internal energy consumed by the CP end in a cycle is 0.015 + 0.022pJ. (There will be a small error here because there is no accurate transition time). Therefore, the internal power consumption is 0.037pJ / 1uS = 37nW.

6. Switch power

The point of the same level transition is only the CP end of the Reg. The capacitance of the CP end is 0.002594pf, the fanout is 1, and the corresponding line load capacitance is 0.0061pf. Libraries electric voltage is 0.9V. So the switch energy is (0.002594 + 0.0061) × 0.9 × 0.9 = 0.007pJ, divided by the period power is 7nW.

Note: switch power is only calculated on the top edge of the pin, and the duration is also the transition time.

7. Peak power consumption

The transition time of this circuit is about 0.6ns, so the peak power consumption at the next jump is 0.022pJ / 0.6ns = 36.8uW. The peak power consumption of the rising edge is (0.015 + 0.007) /0.6ns = 36.8uW.

 8. Leakage power

Leakage of MUX device plus Leakage of Reg: 0.03738 + 0.09871 = 0.136nW.

Comparison with PrimePower results

The calculation result is basically the same as the PP run result, except for two differences:

1. The result does not include the switch power of the input port. As a result, the total power consumption, switch power consumption, and up-edge power consumption are all  7nW smaller than the manual calculation results . This is because the switch behavior is derived from the input of the previous stage. It is understood to the tool that the power consumption of the switch is actually the previous stage consumption, so it is not included in this circuit , and the reported total power will not include the power consumption here. If you need to evaluate such power consumption, you can report it separately using report_power-input_net .

The results are as above, it can be seen that 7.042nW is also very close to the estimated 7nW.

2. The leakage power is slightly different, because the input and output states of MUX and Reg are not considered in the estimation.